{"@context":"https://schema.org","@type":"NewsArticle","generatedAt":"2026-07-28T05:20:57.982Z","headline":"NVIDIA 将 Vera CPU 部署于 EDA 流程，加速下一代芯片设计","description":"NVIDIA 正将 Vera CPU 用于自身 EDA 流程，以加速下一代 CPU 和 GPU 的设计。与 Cadence 及 Synopsys 合作优化后，Cadence Jasper 与 Synopsys VCS 在选定工作负载上性能提升最高达 1.5 倍。","url":"https://www.aioga.com/news/cms3fbu4z00h3rond8fdh4zvr/","mainEntityOfPage":"https://www.aioga.com/news/cms3fbu4z00h3rond8fdh4zvr/","datePublished":"2026-07-27T00:45:42.000Z","dateModified":"2026-07-27T00:45:42.000Z","inLanguage":"zh-CN","publisher":{"@type":"NewsMediaOrganization","name":"Aioga","url":"https://www.aioga.com"},"citation":["https://blogs.nvidia.com/blog/vera-cpu-eda","https://aihot.virxact.com/items/cms3fbu4z00h3rond8fdh4zvr"],"canonicalUrl":"https://www.aioga.com/news/cms3fbu4z00h3rond8fdh4zvr/","directAnswer":{"@type":"Answer","text":"Aioga 编辑摘要：NVIDIA 正将 Vera CPU 用于自身 EDA 流程，以加速下一代 CPU 和 GPU 的设计。 Aioga 将其归入「行业动态」方向，重点关注它对真实使用和行业竞争的影响。","url":"https://www.aioga.com/news/cms3fbu4z00h3rond8fdh4zvr/","dateCreated":"2026-07-27T00:45:42.000Z","author":{"@type":"Organization","@id":"https://www.aioga.com/authors/aioga-editorial/#editorial-team","name":"Aioga Editorial Team","url":"https://www.aioga.com/authors/aioga-editorial/"}},"evidence":[{"@type":"CreativeWork","name":"blogs.nvidia.com source article","url":"https://blogs.nvidia.com/blog/vera-cpu-eda","datePublished":"2026-07-27T00:45:42.000Z","provider":{"@type":"Organization","name":"blogs.nvidia.com","url":"https://blogs.nvidia.com/blog/vera-cpu-eda"}},{"@type":"CreativeWork","name":"AIHot archive record","url":"https://aihot.virxact.com/items/cms3fbu4z00h3rond8fdh4zvr","datePublished":"2026-07-27T00:45:42.000Z","provider":{"@type":"Organization","name":"AIHot","url":"https://aihot.virxact.com/items/cms3fbu4z00h3rond8fdh4zvr"}}],"aggregationSource":"NVIDIA Blog（RSS）","originalPublisher":{"name":"blogs.nvidia.com","url":"https://blogs.nvidia.com/blog/vera-cpu-eda"},"article":{"id":"cms3fbu4z00h3rond8fdh4zvr","slug":"cms3fbu4z00h3rond8fdh4zvr","url":"https://www.aioga.com/news/cms3fbu4z00h3rond8fdh4zvr/","title":"NVIDIA 将 Vera CPU 部署于 EDA 流程，加速下一代芯片设计","title_en":"NVIDIA Harnesses Vera CPU to Speed Up Design of Next-Generation CPUs and GPUs","summary":"NVIDIA 正将 Vera CPU 用于自身 EDA 流程，以加速下一代 CPU 和 GPU 的设计。与 Cadence 及 Synopsys 合作优化后，Cadence Jasper 与 Synopsys VCS 在选定工作负载上性能提升最高达 1.5 倍。","source":"NVIDIA Blog（RSS）","sourceUrl":"https://blogs.nvidia.com/blog/vera-cpu-eda","aiHotUrl":"https://aihot.virxact.com/items/cms3fbu4z00h3rond8fdh4zvr","publishedAt":"2026-07-27T00:45:42.000Z","category":"行业动态","score":38,"selected":false,"articleBody":["The complexity of modern chip design continues to grow as engineering teams work to develop increasingly sophisticated CPUs, GPUs and AI systems. To help meet that challenge, NVIDIA is collaborating with industry leaders Cadence and Synopsys：https://nvidianews.nvidia.com/news/nvidia-expands-nvidia-agent-toolkit-with-nvidia-physicsnemo-and-cuda-x-libraries-to-transform-how-the-world-engineers-designs-and-builds to optimize critical electronic design automation (EDA) applications for the NVIDIA Vera CPU.","NVIDIA is now deploying Vera across EDA workflows used to develop its next generation of CPUs and GPUs, demonstrating how high-performance CPU architecture can help accelerate some of the industry’s most demanding engineering workloads.","What’s at stake is the pace of chip production. In turn, the tempo of industry technologies that stand to benefit from boosted EDA workloads, driving development momentum.","Simulation, verification and implementation technologies play a central role in semiconductor development. Long before a chip reaches manufacturing, engineers spend years validating behavior, identifying corner cases and refining designs through thousands of iterations.","While GPUs and AI have accelerated many aspects of chip design, several critical EDA workloads remain heavily dependent on CPU performance. Logic simulation, formal verification and portions of digital implementation often depend on fast individual cores, efficient memory systems and strong overall throughput.","That makes CPU architecture an important factor in determining how quickly engineering teams can validate designs, explore alternatives and move products toward tapeout.","NVIDIA’s initial testing includes several leading EDA applications. The results highlight Vera’s ability to accelerate two of the most compute-intensive stages of modern chip design. Early testing on selected production-class workflows shows promising results.","Cadence Jasper , a formal verification platform, uses smart proof technology and machine learning to find and fix bugs and improve verification productivity early in the design cycle.","Synopsys VCS, a high-performance functional verification solution used to simulate and validate complex chip designs before fabrication, used the same number of cores in the test.","Both applications showed up to 1.5x higher performance on selected workloads.","Beyond benchmark results, NVIDIA is working closely with both companies on application profiling, software optimization and system-level tuning designed to improve engineering productivity across a broader range of workflows over time.","NVIDIA is deploying Vera throughout the EDA workflows used to create future NVIDIA processors.","Vera combines 88 custom NVIDIA Olympus CPU cores with a high-efficiency LPDDR5X memory subsystem and second generation NVIDIA Scalable Coherent Fabric designed to deliver strong per-core performance, high memory bandwidth and consistent low latency for demanding engineering applications.","These capabilities are particularly important for workloads that mix latency-sensitive jobs with large-scale regression testing across compute farms. Faster execution can shorten individual verification runs, while greater throughput enables engineers to evaluate more design alternatives and complete more validation within the same development window.","After defining a processor’s architecture and microarchitecture, engineers describe much of its behavior at the register-transfer level (RTL). Multiple verification and implementation technologies then work together to transform that design into manufacturable silicon.","These workflows span logic simulation, formal verification, regression testing and digital implementation, helping engineers validate functionality, identify corner cases and transform designs into manufacturable silicon.","Because these stages are interconnected, improvements in verification throughput can help organizations identify issues earlier and reduce costly downstream design iterations.","The deployment of Vera across NVIDIA’s own engineering workflows reflects a broader strategy: accelerate each workload with the compute architecture best suited to the task.","In EDA, GPUs and AI continue to speed many algorithms, while high-performance CPUs remain essential for critical simulation, verification and implementation workloads. Together, they help improve the performance of the overall design cycle.","Looking ahead, NVIDIA plans to build on Vera with the next-generation Rosa CPU, powered by the NVIDIA Rigel core, while continuing to optimize leading EDA applications across its CPU roadmap.","By using NVIDIA CPUs to help design future NVIDIA CPUs and GPUs, the company is creating a continuous feedback loop between silicon design, software optimization and systems engineering, with each generation helping build the next.","Learn more about NVIDIA at DAC 2026 ：https://www.nvidia.com/en-us/events/dac/ ."],"articleImages":[{"sourceUrl":"https://blogs.nvidia.com/wp-content/uploads/2026/07/image3.jpeg","alt":"","afterParagraph":5,"url":"/media/articles/cms3fbu4z00h3rond8fdh4zvr/d48298d4613930e6.jpg"},{"sourceUrl":"https://blogs.nvidia.com/wp-content/uploads/2026/06/gtc26-berlin-open-reg-mktg-kit-corp-blog-1920x1080-1-1-960x540.jpg","alt":"NVIDIA GTC Berlin Registration Is Now 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Rubin","afterParagraph":21,"url":"/media/articles/cms3fbu4z00h3rond8fdh4zvr/0318fbfa13479163.png"},{"sourceUrl":"https://blogs.nvidia.com/wp-content/uploads/2026/07/0715-Physical-AI-Activation-and-BaC-LDA_8618.jpg","alt":"NVIDIA and Japan Bring Full-Stack AI and Robotics to Every Industry","afterParagraph":21,"url":"/media/articles/cms3fbu4z00h3rond8fdh4zvr/675199e37bb05f8c.jpg"}],"mediaStatus":"ok","articleBodyZh":["随着工程团队致力于开发越来越复杂的 CPU、GPU 和 AI 系统，现代芯片设计的复杂性持续增长。为了帮助应对这一挑战，NVIDIA 正与行业领导者 Cadence 和 Synopsys 合作：https://nvidianews.nvidia.com/news/nvidia-expands-nvidia-agent-toolkit-with-nvidia-physicsnemo-and-cuda-x-libraries-to-transform-how-the-world-engineers-designs-and-builds，以优化关键的电子设计自动化（EDA）应用在 NVIDIA Vera CPU 上的性能。","NVIDIA 现在正在将 Vera 部署到用于开发下一代 CPU 和 GPU 的 EDA 工作流程中，展示高性能 CPU 架构如何帮助加速行业中一些最苛刻的工程工作负载。","关键在于芯片生产的速度。进而，受益于增强的 EDA 工作负载的行业技术速度也会提升，从而推动开发势头。","仿真、验证和实现技术在半导体开发中发挥核心作用。在芯片进入制造之前，工程师需要花费多年时间验证行为、识别角落情况并通过成千上万次迭代来优化设计。","尽管 GPU 和 AI 加速了芯片设计的许多方面，但若干关键的 EDA 工作负载仍然高度依赖 CPU 性能。逻辑仿真、形式验证以及部分数字实现通常依赖于快速的单核、有效的内存系统和强大的整体吞吐量。","这使得 CPU 架构成为决定工程团队能够多快验证设计、探索替代方案并将产品推进到流片的重要因素。","NVIDIA 的初步测试包括若干领先的 EDA 应用。结果强调了 Vera 加速现代芯片设计中两个最计算密集阶段的能力。在选定的生产级工作流程上的早期测试显示出令人鼓舞的结果。","Cadence Jasper 是一个形式验证平台，使用智能证明技术和机器学习来查找和修复漏洞，并在设计周期早期提高验证生产力。","Synopsys VCS 是一种高性能功能验证解决方案，用于在制造之前模拟和验证复杂的芯片设计，在测试中使用了相同数量的核心。","在选定的工作负载上，两款应用程序的性能提高了最多 1.5 倍。","除了基准测试结果之外，NVIDIA 还与这两家公司密切合作，进行应用程序分析、软件优化和系统级调优，旨在随着时间推移提升更广泛工作流程的工程生产力。","NVIDIA 正在将 Vera 部署到用于创建未来 NVIDIA 处理器的 EDA 工作流程中。","Vera 结合了 88 个定制的 NVIDIA Olympus CPU 核心、高效的 LPDDR5X 内存子系统以及第二代 NVIDIA 可扩展一致性互联，旨在为高强度工程应用提供强劲的单核性能、高内存带宽和稳定的低延迟。","这些能力对于将延迟敏感作业与大规模回归测试混合在计算集群中运行的工作负载尤其重要。更快的执行速度可以缩短单次验证运行的时间，而更高的吞吐量使工程师能够评估更多设计方案，并在相同开发周期内完成更多验证。","在定义处理器的架构和微架构之后，工程师会在寄存器传输级（RTL）描述其大部分行为。随后，多种验证和实现技术协同工作，将该设计转化为可制造的硅片。","这些工作流程涵盖逻辑仿真、形式验证、回归测试和数字实现，帮助工程师验证功能、识别极端情况，并将设计转化为可制造的硅片。","由于这些阶段相互关联，验证吞吐量的提升可以帮助组织更早发现问题，并减少昂贵的下游设计迭代。","Vera 在 NVIDIA 自身工程工作流程中的部署反映出更广泛的战略：利用最适合任务的计算架构来加速每个工作负载。","在EDA领域，GPU和人工智能继续加速许多算法，而高性能CPU仍然对关键的仿真、验证和实现工作负载至关重要。它们共同帮助提升整体设计周期的性能。","展望未来，NVIDIA计划在Vera的基础上，推出由NVIDIA Rigel核心驱动的下一代Rosa CPU，同时继续优化其CPU路线图上的领先EDA应用程序。","通过使用NVIDIA CPU帮助设计未来的NVIDIA CPU和GPU，公司正在硅设计、软件优化和系统工程之间创建一个持续的反馈循环，每一代都为下一代的发展提供支持。","了解更多关于NVIDIA在DAC 2026的资讯：https://www.nvidia.com/en-us/events/dac/。"],"translationStatus":"translated","bodyOrigin":"source-page","editorial":{"summary":"Aioga 编辑摘要：NVIDIA 正将 Vera CPU 用于自身 EDA 流程，以加速下一代 CPU 和 GPU 的设计。 Aioga 将其归入「行业动态」方向，重点关注它对真实使用和行业竞争的影响。","background":"背景分析：公司与行业类动态需要放在竞争格局、商业化路径、资本信号和监管环境中观察，单条公告不能代表最终结果。","viewpoint":"Aioga 判断：这条动态更适合作为行业观察信号，当前信息足以建立线索，但不足以推导长期结论。","implications":"影响分析：对相关团队而言，短期应先核对来源、可用范围和实际成本，再判断是否值得接入或跟进。","nextStep":"后续观察：继续观察官方文件、合作落地、收入或用户信号、竞品动作和监管后续。","evidenceRefs":["title","summary","articleBody"],"confidence":"medium","status":"published","aiGenerated":false,"autoApproved":true,"generatedBy":"rule-safe-fallback","generatedAt":"2026-07-28T05:28:54.638Z","sourceHash":"03b8abafcd1b8c68","validation":{"passed":true,"mode":"rule-safe-fallback","checks":["schema","length","source-attribution","no-html"]}},"tags":["行业动态","NVIDIA Blog（RSS）"],"translations":{"zh-CN":{"title":"NVIDIA 将 Vera CPU 部署于 EDA 流程，加速下一代芯片设计","summary":"NVIDIA 正将 Vera CPU 用于自身 EDA 流程，以加速下一代 CPU 和 GPU 的设计。与 Cadence 及 Synopsys 合作优化后，Cadence Jasper 与 Synopsys VCS 在选定工作负载上性能提升最高达 1.5 倍。","category":"行业动态","source":"blogs.nvidia.com","aggregationSource":"NVIDIA Blog（RSS）","pageTitle":"NVIDIA 将 Vera CPU 部署于 EDA 流程，加速下一代芯片设计 - Aioga AI资讯","description":"NVIDIA 正将 Vera CPU 用于自身 EDA 流程，以加速下一代 CPU 和 GPU 的设计。与 Cadence 及 Synopsys 合作优化后，Cadence Jasper 与 Synopsys VCS 在选定工作负载上性能提升最高达 1.5 倍。","url":"https://www.aioga.com/news/cms3fbu4z00h3rond8fdh4zvr/"},"en":{"title":"NVIDIA deploys Vera CPU in the EDA process to accelerate next-generation chip design","summary":"NVIDIA is using the Vera CPU in its own EDA workflows to accelerate the design of next-generation CPUs and GPUs. After optimization in collaboration with Cadence and Synopsys, Cadence Jasper and Synopsys VCS achieved up to a 1.5x performance improvement on selected workloads.","category":"Industry","source":"NVIDIA Blog（RSS）","aggregationSource":"NVIDIA Blog（RSS）","pageTitle":"NVIDIA deploys Vera CPU in the EDA process to accelerate next-generation chip design - Aioga AI News","description":"NVIDIA is using the Vera CPU in its own EDA workflows to accelerate the design of next-generation CPUs and GPUs. After optimization in collaboration with Cadence and Synopsys, Cade...","url":"https://www.aioga.com/en/news/cms3fbu4z00h3rond8fdh4zvr/","contentTranslated":true,"sourceHash":"e76c1ee3e1cb6834","translatedAt":"2026-07-28T00:42:46.478Z"},"ja":{"title":"NVIDIA は Vera CPU を EDA フローに導入し、次世代チップ設計を加速する","summary":"NVIDIA は Vera CPU を自社の EDA プロセスで使用して、次世代 CPU と GPU の設計を加速しています。Cadence および Synopsys と協力して最適化した後、Cadence Jasper と Synopsys VCS は選定されたワークロードでの性能が最大 1.5 倍向上しました。","category":"業界動向","source":"NVIDIA Blog（RSS）","aggregationSource":"NVIDIA Blog（RSS）","pageTitle":"NVIDIA は Vera CPU を EDA フローに導入し、次世代チップ設計を加速する - Aioga AIニュース","description":"NVIDIA は Vera CPU を自社の EDA プロセスで使用して、次世代 CPU と GPU の設計を加速しています。Cadence および Synopsys と協力して最適化した後、Cadence Jasper と Synopsys VCS は選定されたワークロードでの性能が最大 1.5 倍向上しました。","url":"https://www.aioga.com/ja/news/cms3fbu4z00h3rond8fdh4zvr/","contentTranslated":true,"sourceHash":"e76c1ee3e1cb6834","translatedAt":"2026-07-28T00:42:58.906Z"},"ko":{"title":"NVIDIA는 Vera CPU를 EDA 프로세스에 배치하여 차세대 칩 설계를 가속화합니다","summary":"NVIDIA는 Vera CPU를 자체 EDA 프로세스에 사용하여 차세대 CPU와 GPU 설계를 가속화하고 있습니다. Cadence 및 Synopsys와의 협력으로 최적화한 후, Cadence Jasper와 Synopsys VCS는 선택된 워크로드에서 성능이 최대 1.5배 향상되었습니다.","category":"업계 동향","source":"NVIDIA Blog（RSS）","aggregationSource":"NVIDIA Blog（RSS）","pageTitle":"NVIDIA는 Vera CPU를 EDA 프로세스에 배치하여 차세대 칩 설계를 가속화합니다 - Aioga AI 뉴스","description":"NVIDIA는 Vera CPU를 자체 EDA 프로세스에 사용하여 차세대 CPU와 GPU 설계를 가속화하고 있습니다. Cadence 및 Synopsys와의 협력으로 최적화한 후, Cadence Jasper와 Synopsys VCS는 선택된 워크로드에서 성능이 최대 1.5배 향상되었습니다.","url":"https://www.aioga.com/ko/news/cms3fbu4z00h3rond8fdh4zvr/","contentTranslated":true,"sourceHash":"e76c1ee3e1cb6834","translatedAt":"2026-07-28T00:43:41.269Z"},"es":{"title":"NVIDIA desplegará la CPU Vera en el flujo de EDA para acelerar el diseño de la próxima generación de chips","summary":"NVIDIA está utilizando la CPU Vera en sus propios procesos de EDA para acelerar el diseño de la próxima generación de CPU y GPU. Tras la optimización en colaboración con Cadence y Synopsys, Cadence Jasper y Synopsys VCS han mejorado el rendimiento hasta 1,5 veces en cargas de trabajo seleccionadas.","category":"Industria","source":"NVIDIA Blog（RSS）","aggregationSource":"NVIDIA Blog（RSS）","pageTitle":"NVIDIA desplegará la CPU Vera en el flujo de EDA para acelerar el diseño de la próxima generación de chips - Aioga Noticias de IA","description":"NVIDIA está utilizando la CPU Vera en sus propios procesos de EDA para acelerar el diseño de la próxima generación de CPU y GPU. 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Après optimisation en coopération avec Cadence et Synopsys, Cadence Jasper et Synopsys VCS ont amélioré les performances jusqu'à 1,5 fois sur des charges de travail sélectionnées.","category":"Industrie","source":"NVIDIA Blog（RSS）","aggregationSource":"NVIDIA Blog（RSS）","pageTitle":"NVIDIA déploie le CPU Vera dans le flux EDA pour accélérer la conception de la prochaine génération de puces - Aioga Actualités IA","description":"NVIDIA utilise le CPU Vera dans ses propres processus EDA pour accélérer la conception des prochaines générations de CPU et de GPU. Après optimisation en coopération avec Cadence e...","url":"https://www.aioga.com/fr/news/cms3fbu4z00h3rond8fdh4zvr/","contentTranslated":true,"sourceHash":"e76c1ee3e1cb6834","translatedAt":"2026-07-28T00:44:19.723Z"},"de":{"title":"NVIDIA setzt die Vera-CPU im EDA-Prozess ein, um das Design der nächsten Chip-Generation zu beschleunigen","summary":"NVIDIA setzt Vera-CPUs in seinen eigenen EDA-Prozessen ein, um die Entwicklung der nächsten Generation von CPUs und GPUs zu beschleunigen. Nach der Optimierung in Zusammenarbeit mit Cadence und Synopsys steigt die Leistung von Cadence Jasper und Synopsys VCS bei ausgewählten Workloads um bis zu das 1,5-Fache.","category":"行业动态","source":"NVIDIA Blog（RSS）","aggregationSource":"NVIDIA Blog（RSS）","pageTitle":"NVIDIA setzt die Vera-CPU im EDA-Prozess ein, um das Design der nächsten Chip-Generation zu beschleunigen - Aioga KI-News","description":"NVIDIA setzt Vera-CPUs in seinen eigenen EDA-Prozessen ein, um die Entwicklung der nächsten Generation von CPUs und GPUs zu beschleunigen. Nach der Optimierung in Zusammenarbeit mi...","url":"https://www.aioga.com/de/news/cms3fbu4z00h3rond8fdh4zvr/","contentTranslated":true,"sourceHash":"e76c1ee3e1cb6834","translatedAt":"2026-07-28T00:44:21.278Z"},"pt-BR":{"title":"A NVIDIA implantou a CPU Vera no fluxo de trabalho EDA, acelerando o design da próxima geração de chips","summary":"A NVIDIA está utilizando a CPU Vera em seus próprios processos de EDA para acelerar o design de CPUs e GPUs de próxima geração. Após otimização em parceria com a Cadence e a Synopsys, o Cadence Jasper e o Synopsys VCS apresentam melhorias de desempenho de até 1,5 vezes em cargas de trabalho selecionadas.","category":"行业动态","source":"NVIDIA Blog（RSS）","aggregationSource":"NVIDIA Blog（RSS）","pageTitle":"A NVIDIA implantou a CPU Vera no fluxo de trabalho EDA, acelerando o design da próxima geração de chips - Aioga Notícias de IA","description":"A NVIDIA está utilizando a CPU Vera em seus próprios processos de EDA para acelerar o design de CPUs e GPUs de próxima geração. Após otimização em parceria com a Cadence e a Synops...","url":"https://www.aioga.com/pt-BR/news/cms3fbu4z00h3rond8fdh4zvr/","contentTranslated":true,"sourceHash":"e76c1ee3e1cb6834","translatedAt":"2026-07-28T00:44:58.786Z"},"ru":{"title":"NVIDIA развертывает процессор Vera в процессах EDA для ускорения проектирования чипов следующего поколения","summary":"NVIDIA использует процессор Vera в собственных EDA-процессах для ускорения проектирования следующего поколения CPU и GPU. После оптимизации в сотрудничестве с Cadence и Synopsys, производительность Cadence Jasper и Synopsys VCS на выбранных рабочих нагрузках увеличилась до 1,5 раз.","category":"行业动态","source":"NVIDIA Blog（RSS）","aggregationSource":"NVIDIA Blog（RSS）","pageTitle":"NVIDIA развертывает процессор Vera в процессах EDA для ускорения проектирования чипов следующего поколения - Aioga Новости ИИ","description":"NVIDIA использует процессор Vera в собственных EDA-процессах для ускорения проектирования следующего поколения CPU и GPU. После оптимизации в сотрудничестве с Cadence и Synopsys, п...","url":"https://www.aioga.com/ru/news/cms3fbu4z00h3rond8fdh4zvr/","contentTranslated":true,"sourceHash":"e76c1ee3e1cb6834","translatedAt":"2026-07-28T00:45:03.401Z"},"ar":{"title":"قامت NVIDIA بنشر معالج Vera في عملية EDA لتسريع تصميم الجيل القادم من الرقائق","summary":"تقوم شركة NVIDIA باستخدام وحدة المعالجة المركزية Vera في عمليات EDA الخاصة بها لتسريع تصميم الجيل القادم من وحدات المعالجة المركزية ووحدات معالجة الرسومات. بعد التعاون مع Cadence و Synopsys لتحسين الأداء، شهد برنامج Cadence Jasper و Synopsys VCS تحسينات في الأداء تصل إلى 1.5 مرة على أحمال العمل المختارة.","category":"行业动态","source":"NVIDIA Blog（RSS）","aggregationSource":"NVIDIA Blog（RSS）","pageTitle":"قامت NVIDIA بنشر معالج Vera في عملية EDA لتسريع تصميم الجيل القادم من الرقائق - Aioga أخبار الذكاء الاصطناعي","description":"تقوم شركة NVIDIA باستخدام وحدة المعالجة المركزية Vera في عمليات EDA الخاصة بها لتسريع تصميم الجيل القادم من وحدات المعالجة المركزية ووحدات معالجة الرسومات. بعد التعاون مع Cadence و...","url":"https://www.aioga.com/ar/news/cms3fbu4z00h3rond8fdh4zvr/","contentTranslated":true,"sourceHash":"e76c1ee3e1cb6834","translatedAt":"2026-07-28T00:45:42.887Z"},"hi":{"title":"NVIDIA ने Vera CPU को EDA प्रक्रियाओं में तैनात किया, अगली पीढ़ी के चिप डिज़ाइन को तेज़ किया","summary":"NVIDIA अपने EDA प्रक्रियाओं में Vera CPU का उपयोग कर रही है ताकि अगली पीढ़ी के CPU और GPU के डिजाइन को तेज किया जा सके। Cadence और Synopsys के साथ सहयोग करके अनुकूलित करने के बाद, Cadence Jasper और Synopsys VCS ने चयनित कार्यभार पर प्रदर्शन में अधिकतम 1.5 गुना सुधार किया।","category":"行业动态","source":"NVIDIA Blog（RSS）","aggregationSource":"NVIDIA Blog（RSS）","pageTitle":"NVIDIA ने Vera CPU को EDA प्रक्रियाओं में तैनात किया, अगली पीढ़ी के चिप डिज़ाइन को तेज़ किया - Aioga AI समाचार","description":"NVIDIA अपने EDA प्रक्रियाओं में Vera CPU का उपयोग कर रही है ताकि अगली पीढ़ी के CPU और GPU के डिजाइन को तेज किया जा सके। Cadence और Synopsys के साथ सहयोग करके अनुकूलित करने के बाद,...","url":"https://www.aioga.com/hi/news/cms3fbu4z00h3rond8fdh4zvr/","contentTranslated":true,"sourceHash":"e76c1ee3e1cb6834","translatedAt":"2026-07-28T00:45:46.455Z"},"it":{"title":"NVIDIA ha implementato la CPU Vera nei processi EDA, accelerando la progettazione dei chip di nuova generazione","summary":"NVIDIA sta utilizzando la CPU Vera nei propri processi EDA per accelerare la progettazione della prossima generazione di CPU e GPU. Dopo l'ottimizzazione in collaborazione con Cadence e Synopsys, Cadence Jasper e Synopsys VCS hanno ottenuto un incremento delle prestazioni fino a 1,5 volte nei carichi di lavoro selezionati.","category":"行业动态","source":"NVIDIA Blog（RSS）","aggregationSource":"NVIDIA Blog（RSS）","pageTitle":"NVIDIA ha implementato la CPU Vera nei processi EDA, accelerando la progettazione dei chip di nuova generazione - Aioga Notizie IA","description":"NVIDIA sta utilizzando la CPU Vera nei propri processi EDA per accelerare la progettazione della prossima generazione di CPU e GPU. Dopo l'ottimizzazione in collaborazione con Cade...","url":"https://www.aioga.com/it/news/cms3fbu4z00h3rond8fdh4zvr/","contentTranslated":true,"sourceHash":"e76c1ee3e1cb6834","translatedAt":"2026-07-28T00:46:26.742Z"},"nl":{"title":"NVIDIA zet de Vera CPU in bij het EDA-proces om de chipontwerpen van de volgende generatie te versnellen","summary":"NVIDIA gebruikt de Vera CPU in zijn eigen EDA-processen om het ontwerp van de volgende generatie CPU's en GPU's te versnellen. Na samenwerking met Cadence en Synopsys voor optimalisatie, verbeterden Cadence Jasper en Synopsys VCS de prestaties van geselecteerde workloads tot maximaal 1,5 keer.","category":"行业动态","source":"NVIDIA Blog（RSS）","aggregationSource":"NVIDIA Blog（RSS）","pageTitle":"NVIDIA zet de Vera CPU in bij het EDA-proces om de chipontwerpen van de volgende generatie te versnellen - Aioga AI-nieuws","description":"NVIDIA gebruikt de Vera CPU in zijn eigen EDA-processen om het ontwerp van de volgende generatie CPU's en GPU's te versnellen. Na samenwerking met Cadence en Synopsys voor optimali...","url":"https://www.aioga.com/nl/news/cms3fbu4z00h3rond8fdh4zvr/","contentTranslated":true,"sourceHash":"e76c1ee3e1cb6834","translatedAt":"2026-07-28T00:46:24.400Z"},"tr":{"title":"NVIDIA, Vera CPU'yu EDA sürecine entegre etti ve bir sonraki nesil çip tasarımını hızlandırdı","summary":"NVIDIA, Vera CPU'yu kendi EDA süreçlerinde kullanarak bir sonraki nesil CPU ve GPU tasarımını hızlandırıyor. Cadence ve Synopsys ile yapılan optimizasyonların ardından, Cadence Jasper ve Synopsys VCS, seçilen iş yüklerinde performansı en fazla 1,5 kat artırdı.","category":"行业动态","source":"NVIDIA Blog（RSS）","aggregationSource":"NVIDIA Blog（RSS）","pageTitle":"NVIDIA, Vera CPU'yu EDA sürecine entegre etti ve bir sonraki nesil çip tasarımını hızlandırdı - Aioga AI Haberleri","description":"NVIDIA, Vera CPU'yu kendi EDA süreçlerinde kullanarak bir sonraki nesil CPU ve GPU tasarımını hızlandırıyor. Cadence ve Synopsys ile yapılan optimizasyonların ardından, Cadence Jas...","url":"https://www.aioga.com/tr/news/cms3fbu4z00h3rond8fdh4zvr/","contentTranslated":true,"sourceHash":"e76c1ee3e1cb6834","translatedAt":"2026-07-28T00:47:05.325Z"},"vi":{"title":"NVIDIA triển khai CPU Vera trong quy trình EDA, tăng tốc thiết kế chip thế hệ tiếp theo","summary":"NVIDIA đang sử dụng CPU Vera trong quy trình EDA của riêng mình để tăng tốc thiết kế CPU và GPU thế hệ tiếp theo. Sau khi tối ưu hóa cùng với Cadence và Synopsys, Cadence Jasper và Synopsys VCS đã cải thiện hiệu suất lên tới 1,5 lần trên các khối lượng công việc được chọn.","category":"行业动态","source":"NVIDIA Blog（RSS）","aggregationSource":"NVIDIA Blog（RSS）","pageTitle":"NVIDIA triển khai CPU Vera trong quy trình EDA, tăng tốc thiết kế chip thế hệ tiếp theo - Tin tức AI Aioga","description":"NVIDIA đang sử dụng CPU Vera trong quy trình EDA của riêng mình để tăng tốc thiết kế CPU và GPU thế hệ tiếp theo. Sau khi tối ưu hóa cùng với Cadence và Synopsys, Cadence Jasper và...","url":"https://www.aioga.com/vi/news/cms3fbu4z00h3rond8fdh4zvr/","contentTranslated":true,"sourceHash":"e76c1ee3e1cb6834","translatedAt":"2026-07-28T00:47:13.851Z"},"id":{"title":"NVIDIA menempatkan CPU Vera dalam proses EDA untuk mempercepat desain chip generasi berikutnya","summary":"NVIDIA sedang menggunakan CPU Vera dalam proses EDA mereka sendiri untuk mempercepat desain CPU dan GPU generasi berikutnya. Setelah dioptimalkan bekerja sama dengan Cadence dan Synopsys, Cadence Jasper dan Synopsys VCS mengalami peningkatan kinerja hingga 1,5 kali pada beban kerja tertentu.","category":"行业动态","source":"NVIDIA Blog（RSS）","aggregationSource":"NVIDIA Blog（RSS）","pageTitle":"NVIDIA menempatkan CPU Vera dalam proses EDA untuk mempercepat desain chip generasi berikutnya - Berita AI Aioga","description":"NVIDIA sedang menggunakan CPU Vera dalam proses EDA mereka sendiri untuk mempercepat desain CPU dan GPU generasi berikutnya. Setelah dioptimalkan bekerja sama dengan Cadence dan Sy...","url":"https://www.aioga.com/id/news/cms3fbu4z00h3rond8fdh4zvr/","contentTranslated":true,"sourceHash":"e76c1ee3e1cb6834","translatedAt":"2026-07-28T00:47:51.565Z"},"th":{"title":"NVIDIA ได้นำ CPU Vera ไปปรับใช้ในกระบวนการ EDA เพื่อเร่งความเร็วการออกแบบชิปรุ่นถัดไป","summary":"NVIDIA กำลังใช้ CPU ของ Vera ในกระบวนการ EDA ของตนเอง เพื่อเร่งการออกแบบ CPU และ GPU รุ่นถัดไป หลังจากร่วมมือกับ Cadence และ Synopsys ในการปรับแต่ง Cadence Jasper และ Synopsys VCS สามารถเพิ่มประสิทธิภาพได้สูงสุด 1.5 เท่าในภาระงานที่เลือก","category":"行业动态","source":"NVIDIA Blog（RSS）","aggregationSource":"NVIDIA Blog（RSS）","pageTitle":"NVIDIA ได้นำ CPU Vera ไปปรับใช้ในกระบวนการ EDA เพื่อเร่งความเร็วการออกแบบชิปรุ่นถัดไป - ข่าว AI Aioga","description":"NVIDIA กำลังใช้ CPU ของ Vera ในกระบวนการ EDA ของตนเอง เพื่อเร่งการออกแบบ CPU และ GPU รุ่นถัดไป หลังจากร่วมมือกับ Cadence และ Synopsys ในการปรับแต่ง Cadence Jasper และ Synopsys VCS...","url":"https://www.aioga.com/th/news/cms3fbu4z00h3rond8fdh4zvr/","contentTranslated":true,"sourceHash":"e76c1ee3e1cb6834","translatedAt":"2026-07-28T00:47:56.878Z"},"pl":{"title":"NVIDIA wdraża procesor Vera w procesach EDA, przyspieszając projektowanie chipów nowej generacji","summary":"NVIDIA wykorzystuje procesory Vera CPU w swoich własnych procesach EDA, aby przyspieszyć projektowanie następnej generacji procesorów CPU i GPU. Po optymalizacji we współpracy z Cadence i Synopsys, Cadence Jasper i Synopsys VCS osiągnęły wzrost wydajności w wybranych obciążeniach nawet do 1,5 raza.","category":"行业动态","source":"NVIDIA Blog（RSS）","aggregationSource":"NVIDIA Blog（RSS）","pageTitle":"NVIDIA wdraża procesor Vera w procesach EDA, przyspieszając projektowanie chipów nowej generacji - Aioga Wiadomości AI","description":"NVIDIA wykorzystuje procesory Vera CPU w swoich własnych procesach EDA, aby przyspieszyć projektowanie następnej generacji procesorów CPU i GPU. Po optymalizacji we współpracy z Ca...","url":"https://www.aioga.com/pl/news/cms3fbu4z00h3rond8fdh4zvr/","contentTranslated":true,"sourceHash":"e76c1ee3e1cb6834","translatedAt":"2026-07-28T00:48:46.065Z"}}}}