{"@context":"https://schema.org","@type":"NewsArticle","generatedAt":"2026-08-11T09:21:12.743Z","headline":"Neo Semiconductor 公布 2T SRAM 设计 X-SRAM，宣称可实现 5 倍片上缓存容量","description":"Neo Semiconductor 在 FMS 2026 上公布双晶体管 （2T） SRAM 设计 X-SRAM，宣称可实现现有方案 5 倍的片上缓存容量，并将片上 SRAM 容量提升到 GB 级别。该设计包含 4 种单元结构，其中 Type B 方案与现有 GAA Nanosheet 逻辑制程直接兼容。公司还展望堆叠式 3D X-SRAM，有望实现 20~40 倍于现有设计的 SRAM 容量。","url":"https://www.aioga.com/news/cmsfe0m8t1oznro2emqgy7bep/","mainEntityOfPage":"https://www.aioga.com/news/cmsfe0m8t1oznro2emqgy7bep/","datePublished":"2026-08-05T01:06:27.000Z","dateModified":"2026-08-05T01:06:27.000Z","inLanguage":"zh-CN","publisher":{"@type":"NewsMediaOrganization","name":"Aioga","url":"https://www.aioga.com"},"citation":["https://www.ithome.com/0/985/783.htm","https://aihot.virxact.com/items/cmsfe0m8t1oznro2emqgy7bep"],"canonicalUrl":"https://www.aioga.com/news/cmsfe0m8t1oznro2emqgy7bep/","directAnswer":{"@type":"Answer","text":"Aioga 编辑摘要：Neo Semiconductor 在 FMS 2026 上公布双晶体管 （2T） SRAM 设计 X-SRAM，宣称可实现现有方案 5 倍的片上缓存容量，并将片上 SRAM 容量提升到 GB 级别。 Aioga 将其归入「产品更新」方向，重点关注它对真实使用和行业竞争的影响。","url":"https://www.aioga.com/news/cmsfe0m8t1oznro2emqgy7bep/","dateCreated":"2026-08-05T01:06:27.000Z","author":{"@type":"Organization","@id":"https://www.aioga.com/authors/aioga-editorial/#editorial-team","name":"Aioga Editorial Team","url":"https://www.aioga.com/authors/aioga-editorial/"}},"evidence":[{"@type":"CreativeWork","name":"IT之家 source article","url":"https://www.ithome.com/0/985/783.htm","datePublished":"2026-08-05T01:06:27.000Z","provider":{"@type":"Organization","name":"IT之家","url":"https://www.ithome.com/0/985/783.htm"}},{"@type":"CreativeWork","name":"AIHot archive record","url":"https://aihot.virxact.com/items/cmsfe0m8t1oznro2emqgy7bep","datePublished":"2026-08-05T01:06:27.000Z","provider":{"@type":"Organization","name":"AIHot","url":"https://aihot.virxact.com/items/cmsfe0m8t1oznro2emqgy7bep"}}],"aggregationSource":"IT之家（RSS）","originalPublisher":{"name":"IT之家","url":"https://www.ithome.com/0/985/783.htm"},"geoDeepAnswer":null,"article":{"id":"cmsfe0m8t1oznro2emqgy7bep","slug":"cmsfe0m8t1oznro2emqgy7bep","url":"https://www.aioga.com/news/cmsfe0m8t1oznro2emqgy7bep/","title":"Neo Semiconductor 公布 2T SRAM 设计 X-SRAM，宣称可实现 5 倍片上缓存容量","title_en":"Neo Semiconductor 公布 2T SRAM，宣称可实现 5 倍片上缓存容量","summary":"Neo Semiconductor 在 FMS 2026 上公布双晶体管 （2T） SRAM 设计 X-SRAM，宣称可实现现有方案 5 倍的片上缓存容量，并将片上 SRAM 容量提升到 GB 级别。该设计包含 4 种单元结构，其中 Type B 方案与现有 GAA Nanosheet 逻辑制程直接兼容。公司还展望堆叠式 3D X-SRAM，有望实现 20~40 倍于现有设计的 SRAM 容量。","source":"IT之家（RSS）","sourceUrl":"https://www.ithome.com/0/985/783.htm","aiHotUrl":"https://aihot.virxact.com/items/cmsfe0m8t1oznro2emqgy7bep","publishedAt":"2026-08-05T01:06:27.000Z","category":"产品更新","score":36,"selected":false,"articleBody":["IT之家：https://www.ithome.com/ 8 月 5 日消息，3D 存储半导体 IP 企业 Neo Semiconductor 在 FMS 2026 上公布了其双晶体管 (2T) SRAM 设计 X-SRAM， 宣称可实现现有方案 5 倍的片上缓存容量 。","IT之家了解到，目前的商业化主流 SRAM 由 6 个晶体管构成，这限制了片上缓存的扩展，而 大 容量高速 SRAM 缓存非常适合推理解码等人工智能工作负载 。Neo Semiconductor 称其 可将片上 SRAM 容量提升到 GB 级别 。","Neo Semiconductor 展示了 4 种不同的 X-SRAM 单元结构： Type B 方案与现有 GAA Nanosheet 尖端逻辑制程直接兼容 ；Type A / C / D 则各有侧重，需要工艺配合调整。","该企业还 展望了堆叠式的 3D X-SRAM ，有望实现 20~40 倍于现有设计的 SRAM 容量。"],"articleImages":[{"sourceUrl":"https://img.ithome.com/newsuploadfiles/2026/8/b5b41ffd-c604-4857-a6ab-0c07e067e121.jpg@s_2,w_820,h_615","alt":"","afterParagraph":0,"url":"/media/articles/cmsfe0m8t1oznro2emqgy7bep/ddc660d81c8f800b.jpg"},{"sourceUrl":"https://img.ithome.com/newsuploadfiles/2026/8/374f6ca3-5140-48bd-9bac-c744ef2aef74.jpg@s_2,w_820,h_615","alt":"","afterParagraph":1,"url":"/media/articles/cmsfe0m8t1oznro2emqgy7bep/b8dac7052714b646.jpg"},{"sourceUrl":"https://img.ithome.com/newsuploadfiles/2026/8/39d34bcd-e3c9-4ee1-bcd4-4d9912d1b67b.jpg@s_2,w_820,h_410","alt":"","afterParagraph":2,"url":"/media/articles/cmsfe0m8t1oznro2emqgy7bep/56dac0dfbb9f5674.jpg"},{"sourceUrl":"https://img.ithome.com/newsuploadfiles/2026/8/287a136b-eb53-4fc8-b3a9-a312510a3eff.jpg@s_2,w_820,h_615","alt":"","afterParagraph":3,"url":"/media/articles/cmsfe0m8t1oznro2emqgy7bep/9724a35fdbd5316f.jpg"}],"mediaStatus":"ok","articleBodyZh":["Neo Semiconductor 公布 2T SRAM 设计 X-SRAM，宣称可实现 5 倍片上缓存容量 这条更新来自 ithome.com，发布时间为 2026-08-05，Aioga 保留原文入口以便核验。","摘要：Neo Semiconductor 在 FMS 2026 上公布双晶体管 （2T） SRAM 设计 X-SRAM，宣称可实现现有方案 5 倍的片上缓存容量，并将片上 SRAM 容量提升到 GB 级别。该设计包含 4 种单元结构，其中 Type B 方案与现有 GAA Nanosheet 逻辑制程直接兼容。公司还展望堆叠式 3D X-SRAM，有望实现 20~40 倍于现有设计的 SRAM 容量。","背景：背景分析：产品与工具类动态的价值取决于它是否解决明确场景、能否进入工作流，以及交付、价格和数据安全是否可接受。","Aioga 观察：Aioga 判断：这条动态更适合作为行业观察信号，当前信息足以建立线索，但不足以推导长期结论。","影响与后续：影响分析：对相关团队而言，短期应先核对来源、可用范围和实际成本，再判断是否值得接入或跟进。 后续观察：继续观察产品是否开放使用、用户反馈、定价、集成能力和后续版本更新。"],"translationStatus":"","bodyOrigin":"source-page","editorial":{"summary":"Aioga 编辑摘要：Neo Semiconductor 在 FMS 2026 上公布双晶体管 （2T） SRAM 设计 X-SRAM，宣称可实现现有方案 5 倍的片上缓存容量，并将片上 SRAM 容量提升到 GB 级别。 Aioga 将其归入「产品更新」方向，重点关注它对真实使用和行业竞争的影响。","background":"背景分析：产品与工具类动态的价值取决于它是否解决明确场景、能否进入工作流，以及交付、价格和数据安全是否可接受。","viewpoint":"Aioga 判断：这条动态更适合作为行业观察信号，当前信息足以建立线索，但不足以推导长期结论。","implications":"影响分析：对相关团队而言，短期应先核对来源、可用范围和实际成本，再判断是否值得接入或跟进。","nextStep":"后续观察：继续观察产品是否开放使用、用户反馈、定价、集成能力和后续版本更新。","evidenceRefs":["title","summary","articleBody"],"confidence":"medium","status":"published","aiGenerated":false,"autoApproved":true,"generatedBy":"rule-safe-fallback","generatedAt":"2026-08-11T09:23:27.674Z","sourceHash":"e1457b8e99a98e1c","validation":{"passed":true,"mode":"rule-safe-fallback","checks":["schema","length","source-attribution","no-html"]}},"tags":["产品更新","IT之家（RSS）"],"translations":{"zh-CN":{"title":"Neo Semiconductor 公布 2T SRAM 设计 X-SRAM，宣称可实现 5 倍片上缓存容量","summary":"Neo Semiconductor 在 FMS 2026 上公布双晶体管 （2T） SRAM 设计 X-SRAM，宣称可实现现有方案 5 倍的片上缓存容量，并将片上 SRAM 容量提升到 GB 级别。该设计包含 4 种单元结构，其中 Type B 方案与现有 GAA Nanosheet 逻辑制程直接兼容。公司还展望堆叠式 3D X-SRAM，有望实现 20~40 倍于现有设计的 SRAM 容量。","category":"产品更新","source":"IT之家","aggregationSource":"IT之家（RSS）","pageTitle":"Neo Semiconductor 公布 2T SRAM 设计 X-SRAM，宣称可实现 5 倍片上缓存容量 - Aioga AI资讯","description":"Neo Semiconductor 在 FMS 2026 上公布双晶体管 （2T） SRAM 设计 X-SRAM，宣称可实现现有方案 5 倍的片上缓存容量，并将片上 SRAM 容量提升到 GB 级别。该设计包含 4 种单元结构，其中 Type B 方案与现有 GAA Nanosheet 逻辑制程直接兼容。公司还展望堆叠式 3D X-SRAM，有望实现 20~...","url":"https://www.aioga.com/news/cmsfe0m8t1oznro2emqgy7bep/","articleBody":["Neo Semiconductor 公布 2T SRAM 设计 X-SRAM，宣称可实现 5 倍片上缓存容量 这条更新来自 ithome.com，发布时间为 2026-08-05，Aioga 保留原文入口以便核验。","摘要：Neo Semiconductor 在 FMS 2026 上公布双晶体管 （2T） SRAM 设计 X-SRAM，宣称可实现现有方案 5 倍的片上缓存容量，并将片上 SRAM 容量提升到 GB 级别。该设计包含 4 种单元结构，其中 Type B 方案与现有 GAA Nanosheet 逻辑制程直接兼容。公司还展望堆叠式 3D X-SRAM，有望实现 20~40 倍于现有设计的 SRAM 容量。","背景：背景分析：产品与工具类动态的价值取决于它是否解决明确场景、能否进入工作流，以及交付、价格和数据安全是否可接受。","Aioga 观察：Aioga 判断：这条动态更适合作为行业观察信号，当前信息足以建立线索，但不足以推导长期结论。","影响与后续：影响分析：对相关团队而言，短期应先核对来源、可用范围和实际成本，再判断是否值得接入或跟进。 后续观察：继续观察产品是否开放使用、用户反馈、定价、集成能力和后续版本更新。"]},"en":{"title":"Neo Semiconductor has announced its 2T SRAM design X-SRAM, claiming it can achieve 5x on-chip cache capacity","summary":"At FMS 2026, Neo Semiconductor unveiled its dual-transistor (2T) SRAM design, X-SRAM, claiming to achieve five times the on-chip cache capacity of existing solutions and increase on-chip SRAM capacity to the GB level. The design includes four cell structures, with the Type B solution directly compatible with the existing GAA Nanosheet logic process. The company also envisions stacked 3D X-SRAM, which is expected to achieve 20~40 times the SRAM capacity of existing designs.","category":"Products","source":"IT之家（RSS）","aggregationSource":"IT之家（RSS）","pageTitle":"Neo Semiconductor has announced its 2T SRAM design X-SRAM, claiming it can achieve 5x on-chip cache capacity - Aioga AI News","description":"At FMS 2026, Neo Semiconductor unveiled its dual-transistor (2T) SRAM design, X-SRAM, claiming to achieve five times the on-chip cache capacity of existing solutions and increase o...","url":"https://www.aioga.com/en/news/cmsfe0m8t1oznro2emqgy7bep/","contentTranslated":true,"sourceHash":"c5a8fabe0c54265d","translatedAt":"2026-08-05T01:22:34.838Z"},"ja":{"title":"ネオセミコンダクターは、2T SRAM設計のX-SRAMを発表し、5倍のオンチップキャッシュ容量を実現できると主張しています","summary":"FMS 2026で、ネオセミコンダクターはデュアルトランジスタ(2T)SRAM設計であるX-SRAMを発表し、既存ソリューションの5倍のオンチップキャッシュ容量を達成し、オンチップSRAM容量をGBレベルまで拡大すると主張しました。 設計には4つのセル構造が含まれており、タイプBソリューションは既存のGAAナノシートロジックプロセスと直接互換性があります。 同社はまた、既存の設計の20~40倍のSRAM容量を実現すると期待されるスタック型3D X-SRAMも構想しています。","category":"製品更新","source":"IT之家（RSS）","aggregationSource":"IT之家（RSS）","pageTitle":"ネオセミコンダクターは、2T SRAM設計のX-SRAMを発表し、5倍のオンチップキャッシュ容量を実現できると主張しています - Aioga AIニュース","description":"FMS 2026で、ネオセミコンダクターはデュアルトランジスタ(2T)SRAM設計であるX-SRAMを発表し、既存ソリューションの5倍のオンチップキャッシュ容量を達成し、オンチップSRAM容量をGBレベルまで拡大すると主張しました。 設計には4つのセル構造が含まれており、タイプBソリューションは既存のGAAナノシートロジックプロセスと直接互換性があります。...","url":"https://www.aioga.com/ja/news/cmsfe0m8t1oznro2emqgy7bep/","contentTranslated":true,"sourceHash":"c5a8fabe0c54265d","translatedAt":"2026-08-05T01:22:36.314Z"},"ko":{"title":"네오 세미컨덕터는 2T SRAM 설계 X-SRAM을 발표했으며, 5배의 온칩 캐시 용량을 달성할 수 있다고 주장했습니다","summary":"FMS 2026에서 네오 세미컨덕터는 듀얼 트랜지스터(2T) SRAM 설계인 X-SRAM을 공개했으며, 기존 솔루션보다 5배의 온칩 캐시 용량을 달성하고 GB 수준으로 온칩 SRAM 용량을 증가시킬 것이라고 주장했습니다. 설계에는 네 개의 셀 구조가 포함되어 있으며, Type B 솔루션은 기존 GAA 나노시트 논리 공정과 직접 호환됩니다. 회사는 또한 기존 설계의 20~40배 더 많은 SRAM 용량을 달성할 것으로 기대되는 스택형 3D X-SRAM 구현도 구상하고 있습니다.","category":"제품 업데이트","source":"IT之家（RSS）","aggregationSource":"IT之家（RSS）","pageTitle":"네오 세미컨덕터는 2T SRAM 설계 X-SRAM을 발표했으며, 5배의 온칩 캐시 용량을 달성할 수 있다고 주장했습니다 - Aioga AI 뉴스","description":"FMS 2026에서 네오 세미컨덕터는 듀얼 트랜지스터(2T) SRAM 설계인 X-SRAM을 공개했으며, 기존 솔루션보다 5배의 온칩 캐시 용량을 달성하고 GB 수준으로 온칩 SRAM 용량을 증가시킬 것이라고 주장했습니다. 설계에는 네 개의 셀 구조가 포함되어 있으며, Type B 솔루션은 기존 GAA 나노시트 논리 공정과...","url":"https://www.aioga.com/ko/news/cmsfe0m8t1oznro2emqgy7bep/","contentTranslated":true,"sourceHash":"c5a8fabe0c54265d","translatedAt":"2026-08-05T01:22:44.971Z"},"es":{"title":"Neo Semiconductor ha anunciado su diseño de SRAM 2T X-SRAM, afirmando que puede alcanzar 5 veces la capacidad de caché integrada en el chip","summary":"En FMS 2026, Neo Semiconductor presentó su diseño de SRAM de dos transistores (2T), X-SRAM, que afirma alcanzar cinco veces la capacidad de caché en chip de las soluciones existentes y aumentar la capacidad de SRAM en chip hasta el nivel de GB. El diseño incluye cuatro estructuras celulares, siendo la solución Tipo B directamente compatible con el proceso lógico existente de Nanohojas GAA. La empresa también prevé una X-SRAM 3D apilada, que se espera alcance 20~40 veces la capacidad de SRAM que los diseños existentes.","category":"Productos","source":"IT之家（RSS）","aggregationSource":"IT之家（RSS）","pageTitle":"Neo Semiconductor ha anunciado su diseño de SRAM 2T X-SRAM, afirmando que puede alcanzar 5 veces la capacidad de caché integrada en el chip - Aioga Noticias de IA","description":"En FMS 2026, Neo Semiconductor presentó su diseño de SRAM de dos transistores (2T), X-SRAM, que afirma alcanzar cinco veces la capacidad de caché en chip de las soluciones existent...","url":"https://www.aioga.com/es/news/cmsfe0m8t1oznro2emqgy7bep/","contentTranslated":true,"sourceHash":"c5a8fabe0c54265d","translatedAt":"2026-08-05T01:22:45.083Z"},"fr":{"title":"Neo Semiconductor a annoncé son X-SRAM 2T de type SRAM, affirmant qu’il peut atteindre une capacité de cache embarquée 5 fois plus grande que","summary":"Lors du FMS 2026, Neo Semiconductor a dévoilé son design de SRAM à double transistor (2T), X-SRAM, affirmant atteindre cinq fois la capacité de cache embarquée par rapport aux solutions existantes et augmenter la capacité de SRAM intégrée au niveau GB. La conception comprend quatre structures cellulaires, la solution de type B étant directement compatible avec le procédé logique GAA Nanosheet existant. L’entreprise envisage également un X-SRAM 3D empilé, qui devrait atteindre 20 ~40 fois la capacité de SRAM des conceptions existantes.","category":"Produits","source":"IT之家（RSS）","aggregationSource":"IT之家（RSS）","pageTitle":"Neo Semiconductor a annoncé son X-SRAM 2T de type SRAM, affirmant qu’il peut atteindre une capacité de cache embarquée 5 fois plus grande que - Aioga Actualités IA","description":"Lors du FMS 2026, Neo Semiconductor a dévoilé son design de SRAM à double transistor (2T), X-SRAM, affirmant atteindre cinq fois la capacité de cache embarquée par rapport aux solu...","url":"https://www.aioga.com/fr/news/cmsfe0m8t1oznro2emqgy7bep/","contentTranslated":true,"sourceHash":"c5a8fabe0c54265d","translatedAt":"2026-08-05T01:22:53.729Z"},"de":{"title":"Neo Semiconductor hat sein 2T-SRAM-Design X-SRAM angekündigt und behauptet, es könne die 5-fache On-Chip-Cachekapazität erreichen","summary":"Auf der FMS 2026 stellte Neo Semiconductor sein Dual-Transistor-(2T) SRAM-Design X-SRAM vor, das behauptet, die fünffache On-Chip-Cache-Kapazität bestehender Lösungen zu erreichen und die On-Chip-SRAM-Kapazität auf GB-Ebene zu erhöhen. Das Design umfasst vier Zellstrukturen, wobei die Typ-B-Lösung direkt mit dem bestehenden GAA-Nanosheet-Logikprozess kompatibel ist. Das Unternehmen plant außerdem eine gestapelte 3D-X-SRAM, die voraussichtlich die 20~40-fache der SRAM-Kapazität bestehender Designs erreichen soll.","category":"产品更新","source":"IT之家（RSS）","aggregationSource":"IT之家（RSS）","pageTitle":"Neo Semiconductor hat sein 2T-SRAM-Design X-SRAM angekündigt und behauptet, es könne die 5-fache On-Chip-Cachekapazität erreichen - Aioga KI-News","description":"Auf der FMS 2026 stellte Neo Semiconductor sein Dual-Transistor-(2T) SRAM-Design X-SRAM vor, das behauptet, die fünffache On-Chip-Cache-Kapazität bestehender Lösungen zu erreichen...","url":"https://www.aioga.com/de/news/cmsfe0m8t1oznro2emqgy7bep/","contentTranslated":true,"sourceHash":"c5a8fabe0c54265d","translatedAt":"2026-08-05T01:22:53.041Z"},"pt-BR":{"title":"A Neo Semiconductor anunciou seu projeto de SRAM 2T X-SRAM, afirmando que ele pode atingir 5x a capacidade de cache no chip","summary":"No FMS 2026, a Neo Semiconductor revelou seu projeto de SRAM de transistores duplos (2T), X-SRAM, alegando alcançar cinco vezes a capacidade de cache no chip das soluções existentes e aumentar a capacidade de SRAM no chip até o nível GB. O projeto inclui quatro estruturas celulares, sendo a solução do Tipo B diretamente compatível com o processo lógico existente de Nanosheets GAA. A empresa também prevê o X-SRAM 3D empilhado, que deve alcançar 20~40 vezes a capacidade de SRAM dos projetos existentes.","category":"产品更新","source":"IT之家（RSS）","aggregationSource":"IT之家（RSS）","pageTitle":"A Neo Semiconductor anunciou seu projeto de SRAM 2T X-SRAM, afirmando que ele pode atingir 5x a capacidade de cache no chip - Aioga Notícias de IA","description":"No FMS 2026, a Neo Semiconductor revelou seu projeto de SRAM de transistores duplos (2T), X-SRAM, alegando alcançar cinco vezes a capacidade de cache no chip das soluções existente...","url":"https://www.aioga.com/pt-BR/news/cmsfe0m8t1oznro2emqgy7bep/","contentTranslated":true,"sourceHash":"c5a8fabe0c54265d","translatedAt":"2026-08-05T01:23:02.538Z"},"ru":{"title":"Neo Semiconductor объявила о своей конструкции 2T SRAM X-SRAM, утверждая, что способна достичь 5-кратной ёмкости кэша на чипе","summary":"На FMS 2026 компания Neo Semiconductor представила свой дизайн SRAM с двумя транзисторами (2T) X-SRAM, заявляя о достижении в пять раз большей ёмкости встроенного кэша по сравнению с существующими решениями и увеличении ёмкости SRAM на чипе до уровня GB. Конструкция включает четыре структуры ячеек, при этом решение типа B напрямую совместимо с существующим логическим процессом GAA Nanosheet. Компания также видит наложенный 3D X-SRAM, который, как ожидается, достигнет в 20~40 раз большей ёмкости SRAM по сравнению с существующими моделями.","category":"产品更新","source":"IT之家（RSS）","aggregationSource":"IT之家（RSS）","pageTitle":"Neo Semiconductor объявила о своей конструкции 2T SRAM X-SRAM, утверждая, что способна достичь 5-кратной ёмкости кэша на чипе - Aioga Новости ИИ","description":"На FMS 2026 компания Neo Semiconductor представила свой дизайн SRAM с двумя транзисторами (2T) X-SRAM, заявляя о достижении в пять раз большей ёмкости встроенного кэша по сравнению...","url":"https://www.aioga.com/ru/news/cmsfe0m8t1oznro2emqgy7bep/","contentTranslated":true,"sourceHash":"c5a8fabe0c54265d","translatedAt":"2026-08-05T01:23:01.511Z"},"ar":{"title":"أعلنت شركة نيو سيميكوندكتور عن تصميم 2T SRAM X-SRAM، مدعية أنها تستطيع تحقيق سعة ذاكرة تخزين مؤقت على الشريحة 5 أضعاف","summary":"في FMS 2026، كشفت شركة Neo Semiconductor عن تصميم ذاكرة SRAM ثنائية الترانزستور (2T)، X-SRAM، مدعية تحقيق سعة ذاكرة تخزين مؤقت على الشريحة خمسة أضعاف الحلول الحالية وزيادة سعة ذاكرة SRAM على الشريحة إلى مستوى GB. يشمل التصميم أربعة هياكل خلايا، حيث يتوافق حل النوع B مباشرة مع عملية منطق GAA Nanosheet الحالية. كما تتصور الشركة ذاكرة X-SRAM ثلاثية الأبعاد مكدسة، والتي من المتوقع أن تحقق قدرة SRAM تتجاوز 20~40 ضعف التصاميم الحالية.","category":"产品更新","source":"IT之家（RSS）","aggregationSource":"IT之家（RSS）","pageTitle":"أعلنت شركة نيو سيميكوندكتور عن تصميم 2T SRAM X-SRAM، مدعية أنها تستطيع تحقيق سعة ذاكرة تخزين مؤقت على الشريحة 5 أضعاف - Aioga أخبار الذكاء الاصطناعي","description":"في FMS 2026، كشفت شركة Neo Semiconductor عن تصميم ذاكرة SRAM ثنائية الترانزستور (2T)، X-SRAM، مدعية تحقيق سعة ذاكرة تخزين مؤقت على الشريحة خمسة أضعاف الحلول الحالية وزيادة سعة ذاكر...","url":"https://www.aioga.com/ar/news/cmsfe0m8t1oznro2emqgy7bep/","contentTranslated":true,"sourceHash":"c5a8fabe0c54265d","translatedAt":"2026-08-05T01:23:11.271Z"},"hi":{"title":"नियो सेमीकंडक्टर ने अपने 2T SRAM डिज़ाइन X-SRAM की घोषणा की है, जिसमें दावा किया गया है कि यह 5x ऑन-चिप कैश क्षमता प्राप्त कर सकता है","summary":"एफएमएस 2026 में, नियो सेमीकंडक्टर ने अपने डुअल-ट्रांजिस्टर (2T) SRAM डिज़ाइन, X-SRAM का अनावरण किया, जो मौजूदा समाधानों की ऑन-चिप कैश क्षमता का पांच गुना हासिल करने और ऑन-चिप SRAM क्षमता को GB स्तर तक बढ़ाने का दावा करता है। डिजाइन में चार सेल संरचनाएं शामिल हैं, जिसमें टाइप बी समाधान सीधे मौजूदा जीएए नैनोशीट लॉजिक प्रक्रिया के साथ संगत है। कंपनी स्टैक्ड 3डी एक्स-एसआरएएम की भी कल्पना करती है, जिससे मौजूदा डिजाइनों की एसआरएएम क्षमता का 20 ~ 40 गुना हासिल करने की उम्मीद है।","category":"产品更新","source":"IT之家（RSS）","aggregationSource":"IT之家（RSS）","pageTitle":"नियो सेमीकंडक्टर ने अपने 2T SRAM डिज़ाइन X-SRAM की घोषणा की है, जिसमें दावा किया गया है कि यह 5x ऑन-चिप कैश क्षमता प्राप्त कर सकता है - Aioga AI समाचार","description":"एफएमएस 2026 में, नियो सेमीकंडक्टर ने अपने डुअल-ट्रांजिस्टर (2T) SRAM डिज़ाइन, X-SRAM का अनावरण किया, जो मौजूदा समाधानों की ऑन-चिप कैश क्षमता का पांच गुना हासिल करने और ऑन-चिप SRAM...","url":"https://www.aioga.com/hi/news/cmsfe0m8t1oznro2emqgy7bep/","contentTranslated":true,"sourceHash":"c5a8fabe0c54265d","translatedAt":"2026-08-05T01:23:11.379Z"},"it":{"title":"Neo Semiconductor ha annunciato il suo progetto SRAM 2T X-SRAM, affermando di poter raggiungere una capacità di cache on-chip 5 volte","summary":"Al FMS 2026, Neo Semiconductor ha presentato il suo progetto SRAM a doppio transistor (2T), X-SRAM, che afferma di raggiungere cinque volte la capacità di cache on-chip rispetto alle soluzioni esistenti e di aumentare la capacità SRAM on-chip fino al livello GB. Il progetto include quattro strutture cellulari, con la soluzione di Tipo B direttamente compatibile con il processo logico GAA Nanosheet esistente. L'azienda prevede anche un X-SRAM 3D sovrapposto, che dovrebbe raggiungere una capacità SRAM 20~40 volte superiore ai progetti esistenti.","category":"产品更新","source":"IT之家（RSS）","aggregationSource":"IT之家（RSS）","pageTitle":"Neo Semiconductor ha annunciato il suo progetto SRAM 2T X-SRAM, affermando di poter raggiungere una capacità di cache on-chip 5 volte - Aioga Notizie IA","description":"Al FMS 2026, Neo Semiconductor ha presentato il suo progetto SRAM a doppio transistor (2T), X-SRAM, che afferma di raggiungere cinque volte la capacità di cache on-chip rispetto al...","url":"https://www.aioga.com/it/news/cmsfe0m8t1oznro2emqgy7bep/","contentTranslated":true,"sourceHash":"c5a8fabe0c54265d","translatedAt":"2026-08-05T01:23:20.055Z"},"nl":{"title":"Neo Semiconductor heeft zijn 2T SRAM-ontwerp X-SRAM aangekondigd en beweert dat het 5x on-chip cachecapaciteit kan bereiken","summary":"Op FMS 2026 onthulde Neo Semiconductor zijn dual-transistor (2T) SRAM-ontwerp, X-SRAM, dat beweert vijf keer de on-chip cachecapaciteit van bestaande oplossingen te bereiken en de on-chip SRAM-capaciteit tot GB-niveau te verhogen. Het ontwerp omvat vier celstructuren, waarbij de Type B-oplossing direct compatibel is met het bestaande GAA Nanosheet logicaproces. Het bedrijf voorziet ook gestapelde 3D X-SRAM, die naar verwachting 20~40 keer de SRAM-capaciteit van bestaande ontwerpen zal bereiken.","category":"产品更新","source":"IT之家（RSS）","aggregationSource":"IT之家（RSS）","pageTitle":"Neo Semiconductor heeft zijn 2T SRAM-ontwerp X-SRAM aangekondigd en beweert dat het 5x on-chip cachecapaciteit kan bereiken - Aioga AI-nieuws","description":"Op FMS 2026 onthulde Neo Semiconductor zijn dual-transistor (2T) SRAM-ontwerp, X-SRAM, dat beweert vijf keer de on-chip cachecapaciteit van bestaande oplossingen te bereiken en de...","url":"https://www.aioga.com/nl/news/cmsfe0m8t1oznro2emqgy7bep/","contentTranslated":true,"sourceHash":"c5a8fabe0c54265d","translatedAt":"2026-08-05T01:23:19.882Z"},"tr":{"title":"Neo Semiconductor, 2T SRAM tasarımı X-SRAM'ı duyurdu ve bunun 5x çip içi önbellek kapasitesine ulaşabileceğini iddia etti","summary":"FMS 2026'da Neo Semiconductor, çift transistörlü (2T) SRAM tasarımı X-SRAM'ı tanıttı; mevcut çözümlerin beş katı üzerinde çip önbellek kapasitesine ulaştığını ve çip içi SRAM kapasitesini GB seviyesine çıkardığını iddia etti. Tasarımda dört hücre yapısı bulunur ve Tip B çözümü mevcut GAA Nanosheet mantık süreciyle doğrudan uyumlu olur. Şirket ayrıca mevcut tasarımların SRAM kapasitesinin 20~40 katına ulaşması beklenen stacked 3D X-SRAM'ı da öngörüyor.","category":"产品更新","source":"IT之家（RSS）","aggregationSource":"IT之家（RSS）","pageTitle":"Neo Semiconductor, 2T SRAM tasarımı X-SRAM'ı duyurdu ve bunun 5x çip içi önbellek kapasitesine ulaşabileceğini iddia etti - Aioga AI Haberleri","description":"FMS 2026'da Neo Semiconductor, çift transistörlü (2T) SRAM tasarımı X-SRAM'ı tanıttı; mevcut çözümlerin beş katı üzerinde çip önbellek kapasitesine ulaştığını ve çip içi SRAM kapas...","url":"https://www.aioga.com/tr/news/cmsfe0m8t1oznro2emqgy7bep/","contentTranslated":true,"sourceHash":"c5a8fabe0c54265d","translatedAt":"2026-08-05T01:23:29.607Z"},"vi":{"title":"Neo Semiconductor đã công bố thiết kế SRAM 2T X-SRAM, tuyên bố có thể đạt dung lượng bộ nhớ đệm trên chip gấp 5 lần.","summary":"Tại FMS 2026, Neo Semiconductor đã giới thiệu thiết kế SRAM hai transistor (2T), X-SRAM, tuyên bố đạt được gấp năm lần dung lượng bộ nhớ đệm trên chip so với các giải pháp hiện có và tăng dung lượng SRAM trên chip lên mức GB. Thiết kế bao gồm bốn cấu trúc tế bào, với giải pháp Type B tương thích trực tiếp với quy trình logic GAA Nanosheet hiện có. Công ty cũng hình dung ra X-SRAM 3D xếp chồng, dự kiến sẽ đạt dung lượng SRAM gấp 20~40 lần so với các thiết kế hiện có.","category":"产品更新","source":"IT之家（RSS）","aggregationSource":"IT之家（RSS）","pageTitle":"Neo Semiconductor đã công bố thiết kế SRAM 2T X-SRAM, tuyên bố có thể đạt dung lượng bộ nhớ đệm trên chip gấp 5 lần. - Tin tức AI Aioga","description":"Tại FMS 2026, Neo Semiconductor đã giới thiệu thiết kế SRAM hai transistor (2T), X-SRAM, tuyên bố đạt được gấp năm lần dung lượng bộ nhớ đệm trên chip so với các giải pháp hiện có...","url":"https://www.aioga.com/vi/news/cmsfe0m8t1oznro2emqgy7bep/","contentTranslated":true,"sourceHash":"c5a8fabe0c54265d","translatedAt":"2026-08-05T01:23:28.763Z"},"id":{"title":"Neo Semiconductor telah mengumumkan desain 2T SRAM X-SRAM, mengklaim dapat mencapai kapasitas cache on-chip 5x","summary":"Di FMS 2026, Neo Semiconductor memperkenalkan desain SRAM dual-transistor (2T), X-SRAM, yang mengklaim dapat mencapai kapasitas cache on-chip lima kali lipat dibandingkan solusi yang ada dan meningkatkan kapasitas SRAM on-chip hingga tingkat GB. Desainnya mencakup empat struktur sel, dengan solusi Tipe B yang langsung kompatibel dengan proses logika GAA Nanosheet yang sudah ada. Perusahaan juga membayangkan 3D X-SRAM bertumpuk, yang diharapkan mencapai kapasitas SRAM 20~40 kali lipat dari desain yang ada.","category":"产品更新","source":"IT之家（RSS）","aggregationSource":"IT之家（RSS）","pageTitle":"Neo Semiconductor telah mengumumkan desain 2T SRAM X-SRAM, mengklaim dapat mencapai kapasitas cache on-chip 5x - Berita AI Aioga","description":"Di FMS 2026, Neo Semiconductor memperkenalkan desain SRAM dual-transistor (2T), X-SRAM, yang mengklaim dapat mencapai kapasitas cache on-chip lima kali lipat dibandingkan solusi ya...","url":"https://www.aioga.com/id/news/cmsfe0m8t1oznro2emqgy7bep/","contentTranslated":true,"sourceHash":"c5a8fabe0c54265d","translatedAt":"2026-08-05T01:23:37.444Z"},"th":{"title":"Neo Semiconductor ได้ประกาศการออกแบบ SRAM 2T X-SRAM โดยอ้างว่าสามารถรองรับแคชบนชิปได้ถึง 5 เท่า","summary":"ในงาน FMS 2026 Neo Semiconductor ได้เปิดตัวการออกแบบ SRAM แบบทรานซิสเตอร์คู่ (2T) ที่ชื่อว่า X-SRAM โดยอ้างว่าสามารถเพิ่มความจุแคชบนชิปได้ถึงห้าเท่าของโซลูชันที่มีอยู่ และเพิ่มความจุ SRAM บนชิปให้สูงถึง GB การออกแบบประกอบด้วยโครงสร้างเซลล์สี่แบบ โดยโซลูชัน Type B สามารถใช้งานร่วมกับกระบวนการตรรกะ GAA Nanosheet ที่มีอยู่ได้โดยตรง บริษัทยังมีแผนจะสร้าง X-SRAM แบบซ้อนกัน ซึ่งคาดว่าจะสามารถรองรับความจุ SRAM ได้ถึง 20~40 เท่าของดีไซน์เดิม","category":"产品更新","source":"IT之家（RSS）","aggregationSource":"IT之家（RSS）","pageTitle":"Neo Semiconductor ได้ประกาศการออกแบบ SRAM 2T X-SRAM โดยอ้างว่าสามารถรองรับแคชบนชิปได้ถึง 5 เท่า - ข่าว AI Aioga","description":"ในงาน FMS 2026 Neo Semiconductor ได้เปิดตัวการออกแบบ SRAM แบบทรานซิสเตอร์คู่ (2T) ที่ชื่อว่า X-SRAM โดยอ้างว่าสามารถเพิ่มความจุแคชบนชิปได้ถึงห้าเท่าของโซลูชันที่มีอยู่ และเพิ่มความ...","url":"https://www.aioga.com/th/news/cmsfe0m8t1oznro2emqgy7bep/","contentTranslated":true,"sourceHash":"c5a8fabe0c54265d","translatedAt":"2026-08-05T01:23:38.415Z"},"pl":{"title":"Neo Semiconductor ogłosiło swój projekt 2T X-, twierdząc, że może osiągnąć 5x pojemność pamięci podręcznej na chipie","summary":"Na FMS 2026 Neo Semiconductor zaprezentował swój projekt z dwoma tranzystorami (2T), X-, deklarując osiągnięcie pięciokrotnie większej pojemności pamięci podręcznej na chipie niż istniejące rozwiązania oraz zwiększenie pojemności pamięci na chipie do poziomu GB. Projekt obejmuje cztery struktury komórkowe, a rozwiązanie typu B jest bezpośrednio kompatybilne z istniejącym procesem logiki nanoarkuszowej GAA. Firma planuje także stacked 3D X-, który ma osiągnąć 20~40 razy większą pojemność niż istniejące projekty.","category":"产品更新","source":"IT之家（RSS）","aggregationSource":"IT之家（RSS）","pageTitle":"Neo Semiconductor ogłosiło swój projekt 2T X-, twierdząc, że może osiągnąć 5x pojemność pamięci podręcznej na chipie - Aioga Wiadomości AI","description":"Na FMS 2026 Neo Semiconductor zaprezentował swój projekt z dwoma tranzystorami (2T), X-, deklarując osiągnięcie pięciokrotnie większej pojemności pamięci podręcznej na chipie niż i...","url":"https://www.aioga.com/pl/news/cmsfe0m8t1oznro2emqgy7bep/","contentTranslated":true,"sourceHash":"c5a8fabe0c54265d","translatedAt":"2026-08-05T01:23:47.309Z"}}}}