NVIDIA 推出 CUDA Rust：cuda-oxide 与 cutile-rs 让 Rust 编写编译期安全的 GPU kernel

NVIDIA 宣布推出 CUDA Rust：https://developer.nvidia.com/blog/introducing-cuda-rust-two-tracks-for-writing-gpu-kernels/，旨在使 Rust 成为编写 GPU 内核的一流语言。Rust 代码已经可以启动 CUDA 内核，但内核主体通常需要在其他地方编写。CUDA Rust 通过两个 NVlabs 开源项目弥补了这一差距：cuda-oxide：https://github.com/NVlabs/cuda-oxide 用于 SIMT 模型，cutile-rs：https://github.com/NVlabs/cutile-rs 用于更新的 Tile 模型。两者都能原生编译 Rust 内核，并使用 Rust 的所有权规则在编译时防止别名错误。

它可以部署吗？部分可以。cutile-rs 已发布在 crates.io：https://crates.io/crates/cutile，在稳定的 Rust 1.89+ 版本上运行，并已被用于 Hugging Face 的 Grout：https://github.com/huggingface/grout 推理引擎和 mistral.rs：https://github.com/EricLBuehler/mistral.rs。cuda-oxide 处于早期 alpha 阶段。两个项目都处于 alpha 阶段，尚未确认可用于生产环境。

从推理引擎到驱动程序和代理运行时，AI 的系统层越来越多地使用 Rust 编写。NVIDIA 的 Nova Linux 驱动是用 Rust 编写的，NVIDIA Dynamo：https://www.nvidia.com/en-us/ai/dynamo/ 具有 Rust 核心，NVTX 也有 Rust 绑定。GPU 内核是一个例外。

这两个途径对应 CUDA 已经提供的两种编程模型。SIMT 是 CUDA C++ 和 numba-cuda：https://nvidia.github.io/numba-cuda/ 使用的模型：你描述一个线程的动作并启动成千上万的线程。Tile 是较新的模型，也可用于 C++：https://docs.nvidia.com/cuda/cuda-tile-cpp-api-reference/ 和 Python：https://docs.nvidia.com/cuda/cutile-python/：你描述一片数据瓦片的动作，Tile IR 编译器：https://docs.nvidia.com/cuda/tile-ir/latest/index.html 负责线程映射和内存布局。NVIDIA 建议优先使用 Tile，而对于需要显式线程和内存控制的场景使用 SIMT。计划中的跨语言互操作意味着选择 Rust 不会让开发者无法使用 C++ 或 Python。

cuda-oxide 是一个自定义的 rustc 代码生成后端。它通过 Rust MIR、社区的 Pliron：https://github.com/pliron-org/pliron IR 框架和 LLVM IR 将 #[kernel] 函数路由到 PTX，然后将其他部分交给标准后端处理。NVIDIA 在 Pliron 之上编写了 GPU 方言。

要求：Linux操作系统，计算能力为8.0或更高版本的GPU，CUDA 12.x或更高版本，带有libclang的clang，以及固定的nightly工具链（nightly-2026-04-03）。cargo oxide doctor检查环境设置，cargo oxide new生成向量加法程序，主机和设备代码在同一个文件中。

安全性论证体现在内核签名中。输入a和b是普通共享切片。输出c是DisjointSlice，一种类型，使每个线程可以独占地访问其自己的元素。普通的&mut [f32]需要每个线程保持相同的可变借用，但Rust不允许。c.get_mut(idx)返回Option，因此越界访问会变成可处理的分支。#[launch_contract]属性声明了块形状，生成的prepare_vecadd方法在安全启动运行前验证启动配置。

cutile-rs的工作层级更高。每个tile块将内核体作为单个逻辑线程在一个子张量上运行一次，真正的GPU线程数量由编译器决定。#[cutile::module]宏将内核的AST嵌入到主机二进制文件中，并在内核首次启动时通过CUDA Tile IR进行JIT编译。

要求更轻：计算能力8.0或更高版本，CUDA 13.3，稳定版Rust 1.89或更高版本，以及Linux，无需nightly和自定义LLVM。设置步骤是cargo new，然后cargo add cutile。

主机端的.partition([128])调用完成三个任务。它给每个tile独占其128元素的块，固定网格为1,024 / 128 = 8个tile，并提供常数tile宽度B。输入张量使用-1作为在启动时解析的动态维度。生成的launcher接管所有张量的所有权，并在GPU完成后返回它们。在执行.sync_on(&stream)之前没有任何操作；它之前的一切只是通过一个链条记录的惰性描述。

将SIMT内核的输出缓冲区作为它自己的输入之一传递会导致错误[E0502]：无法将c_dev作为可变借用，因为它也被不可变借用。在Tile端进行相同的别名操作会失败并报错[E0382]：使用已移动的值：z。cuda-oxide检查每次启动调用；cutile-rs的所有权机制在启动边界跨越张量，NVIDIA称其为更强的保证。

Tile 不暴露任何可被滥用的共享内存或线程索引。SIMT 保持对其的控制，但 cuda-oxide 中的共享内存目前需要使用 unsafe。

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NVIDIA has announced CUDA Rust：https://developer.nvidia.com/blog/introducing-cuda-rust-two-tracks-for-writing-gpu-kernels/, a push to make Rust a first-class language for writing GPU kernels. Rust code could already launch CUDA kernels, but the kernel body usually had to be written elsewhere. CUDA Rust closes that gap with two NVlabs open-source projects: cuda-oxide：https://github.com/NVlabs/cuda-oxide for the SIMT model and cutile-rs：https://github.com/NVlabs/cutile-rs for the newer Tile model. Both compile Rust kernels natively and use Rust’s ownership rules to reject aliasing bugs at compile time.

Is it deployable? Partially. cutile-rs is published on crates.io：https://crates.io/crates/cutile, runs on stable Rust 1.89+, and is already used in Hugging Face’s Grout：https://github.com/huggingface/grout inference engine and in mistral.rs：https://github.com/EricLBuehler/mistral.rs. cuda-oxide is early alpha. The both projects are in alpha phase and not confirmed for production.

The systems layer of AI, from inference engines to drivers and agent runtimes, is increasingly written in Rust. NVIDIA’s Nova Linux driver is in Rust, NVIDIA Dynamo：https://www.nvidia.com/en-us/ai/dynamo/ has a Rust core, and NVTX has Rust bindings. The GPU kernel was the exception.

The two tracks mirror the two programming models CUDA already offers. SIMT is the model used in CUDA C++ and numba-cuda：https://nvidia.github.io/numba-cuda/: you describe what one thread does and launch thousands of them. Tile is the newer model, also available in C++：https://docs.nvidia.com/cuda/cuda-tile-cpp-api-reference/ and Python：https://docs.nvidia.com/cuda/cutile-python/: you describe what one tile of data does, and the Tile IR compiler：https://docs.nvidia.com/cuda/tile-ir/latest/index.html handles thread mapping and memory layout. NVIDIA recommends Tile first, with SIMT for explicit thread and memory control. Planned inter-language interop means choosing Rust will not lock developers out of C++ or Python.

cuda-oxide is a custom rustc codegen backend. It routes #[kernel] functions through Rust MIR, the community Pliron：https://github.com/pliron-org/pliron IR framework, and LLVM IR down to PTX, then hands everything else to the standard backend. NVIDIA wrote the GPU dialects on top of Pliron.

Requirements: Linux, a GPU with compute capability 8.0 or later, CUDA 12.x or newer, clang with libclang, and a pinned nightly toolchain ( nightly-2026-04-03 ). cargo oxide doctor checks the setup and cargo oxide new scaffolds a vector addition program, with host and device code in one file.

The safety argument sits in the kernel signature. Inputs a and b are ordinary shared slices. The output c is a DisjointSlice , a type that gives each thread exclusive access to its own element. A plain &mut [f32] would need every thread to hold the same mutable borrow, which Rust refuses. c.get_mut(idx) returns an Option , so out-of-bounds access becomes a handled branch. A #[launch_contract] attribute declares the block shape, and the generated prepare_vecadd method validates the launch configuration against it before the safe launch runs.

cutile-rs works one level higher. Each tile block runs the kernel body once as a single logical thread over one sub-tensor, and the compiler decides how many real GPU threads back it. The #[cutile::module] macro embeds the kernel’s AST in the host binary and JIT-compiles it through CUDA Tile IR when the kernel is first launched.

Requirements are lighter: compute capability 8.0 or later, CUDA 13.3, stable Rust 1.89 or newer, and Linux, with no nightly and no custom LLVM. Setup is cargo new , then cargo add cutile .

The host-side .partition([128]) call does 3 jobs. It gives each tile exclusive ownership of its 128-element chunk, fixes the grid at 1,024 / 128 = 8 tiles, and supplies the const tile width B . Input tensors use -1 as a dynamic dimension resolved at launch. The generated launcher takes ownership of all tensors and returns them when the GPU finishes. Nothing executes until .sync_on(&stream) ; everything before it is a lazy description recorded in one chain.

Passing the SIMT kernel’s output buffer as one of its own inputs fails with error[E0502]: cannot borrow c_dev as mutable because it is also borrowed as immutable . The same aliasing on the Tile side fails with error[E0382]: use of moved value: z . cuda-oxide checks each launch call; cutile-rs’s ownership follows tensors across the launch boundary, which NVIDIA calls the stronger guarantee.

Tile exposes no shared memory or thread indexing to misuse. SIMT keeps that control, but shared memory in cuda-oxide currently requires unsafe .

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